tlc272

The TLC272 and TLC277 work well in conjunction with digital logic; however, when powering both linear devices
and digital logic from the same power supply, the following precautions are recommended:

1.

Power the linear devices from separate bypassed supply lines (see Figure 39); otherwise, the linear
device supply rails can fluctuate due to voltage drops caused by high switching currents in the digital
logic.

2.

Use proper bypass techniques to reduce the probability of noise-induced errors. Single capacitive
decoupling is often adequate; however, high-frequency applications may require RC decoupling.

–

+

C
0.01 

µF

R3

VREF

VI

R1

R2

VDD

VO

R4

V

REF +

V

DD

R3

R1

) R3

V

O +

(V

REF *

V

I

) R4

R2

) V

REF

Figure 38. Inverting Amplifier With Voltage Reference

(b) SEPARATE BYPASSED SUPPLY RAILS (preferred)

(a) COMMON SUPPLY RAILS

–

+

–

+

Logic

Logic

Logic

Power
Supply

Supply

Power

Logic

Logic

Logic

OUT

OUT

Figure 39. Common vs Separate Supply Rails

TLC272, TLC272A, TLC272B, TLC272Y, TLC277
LinCMOS

 PRECISION DUAL OPERATIONAL AMPLIFIERS

SLOS091E – OCTOBER 1987 – REVISED FEBRUARY 2002

30

POST OFFICE BOX 655303 

• DALLAS, TEXAS 75265

APPLICATION INFORMATION

input characteristics

The TLC272 and TLC277 are specified with a minimum and a maximum input voltage that, if exceeded at either
input, could cause the device to malfunction. Exceeding this specified range is a common problem, especially
in single-supply operation. Note that the lower range limit includes the negative rail, while the upper range limit
is specified at VDD – 1 V at TA = 25°C and at VDD – 1.5 V at all other temperatures.

The use of the polysilicon-gate process and the careful input circuit design gives the TLC272 and TLC277 very
good input offset voltage drift characteristics relative to conventional metal-gate processes. Offset voltage drift
in CMOS devices is highly influenced by threshold voltage shifts caused by polarization of the phosphorus
dopant implanted in the oxide. Placing the phosphorus dopant in a conductor (such as a polysilicon gate)
alleviates the polarization problem, thus reducing threshold voltage shifts by more than an order of magnitude.
The offset voltage drift with time has been calculated to be typically 0.1 

µV/month, including the first month of

operation.

Because of the extremely high input impedance and resulting low bias current requirements, the TLC272 and
TLC277 are well suited for low-level signal processing; however, leakage currents on printed-circuit boards and
sockets can easily exceed bias current requirements and cause a degradation in device performance. It is good
practice to include guard rings around inputs (similar to those of Figure 4 in the Parameter Measurement
Information section). These guards should be driven from a low-impedance source at the same voltage level
as the common-mode input (see Figure 40).